Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder

@article{Xu2006PowerefficientVI,
  title={Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder},
  author={Ke Xu and Oliver Chiu-sing Choy and Cheong-fat Chan and Kong-Pang Pun},
  journal={2006 IEEE International Symposium on Circuits and Systems},
  year={2006},
  pages={4 pp.-}
}
In this paper, we propose a power-efficient bitstream parsing for H.264/AVC baseline profile decoding. It parses the input bitstream syntaxes and controls the following decoding steps. Various power reduction techniques, such as data-driven based on statistic results, nonuniform partition, precomputation, guarded evaluation, hierarchical FSM decomposition, clock gating etc., have been adopted in our design. The VLSI implementation results show that under UMC130nm technology with 1.08V supply… CONTINUE READING