Power-delay modeling of dynamic CMOS gates for circuit optimization

Abstract

We present an accurate analytical expression to compute power and delay of domino CMOS circuits from a detailed description of internal capacitor switching and discharging currents. The expression obtained accounts for the main effects in complex sub-micron gates like velocity saturation effects, body effect, device sizes and coupling capacitors. The energy… (More)

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@article{Rossell2001PowerdelayMO, title={Power-delay modeling of dynamic CMOS gates for circuit optimization}, author={Jos{\'e} Luis Rossell{\'o} and Jaume Segura}, journal={IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281)}, year={2001}, pages={494-499} }