Power-aware modulo scheduling for high-performance VLIW processors

  title={Power-aware modulo scheduling for high-performance VLIW processors},
  author={Han-Saem Yun and Jihong Kim},
For high-performance processors, the step power and peak power, which are closely related to the chip reliability, are important design constraints, often more than the average power. In VLIW processors where a single instruction may contain a variable number of operations, the step power and peak power vary significantly depending on the parallel schedule generated by a parallelizing compiler. In this paper, we propose a power-aware modulo scheduling algorithm for high-performance VLIW… CONTINUE READING
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