Power Reduction Technique in LFSR using Modified Control Logic for VLSI Circuit

  • Praveen J Alva
  • Published 2013

Abstract

A linear feedback shift register (LFSR) is proposed technique which targets to reduce the power consumption within BIST itself. It reduces the power consumption during testing of a Circuit Under Test (CUT) at two stages. At first stage, Control Logic (CL) makes the clocks of the switching units of the register inactive for a time period when output from… (More)

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