Power Delivery for 3-D Chip Stacks: Physical Modeling and Design Implication

@article{Huang2012PowerDF,
  title={Power Delivery for 3-D Chip Stacks: Physical Modeling and Design Implication},
  author={Gang Huang and Muhannad S. Bakir and Azad Naeemi and James D. Meindl},
  journal={IEEE Transactions on Components, Packaging and Manufacturing Technology},
  year={2012},
  volume={2},
  pages={852-859}
}
3-D integration creates vast opportunities to improve performance and the level of integration in nanoelectronic systems. However, 3-D integration presents many challenges for power delivery network design due to larger supply currents and longer power delivery paths compared to 2-D systems. In this paper, an analytical physical model is derived to incorporate the impact of 3-D integration on power supply noise. The model has less than 4% error compared to SPICE simulations. Based on the model… CONTINUE READING

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