Power Balanced Gates Insensitive to Routing Capacitance Mismatch

  title={Power Balanced Gates Insensitive to Routing Capacitance Mismatch},
  author={Konrad J. Kulikowski and Vyas Venkataraman and Zhen Wang and Alexander Taubin},
  journal={2008 Design, Automation and Test in Europe},
Cryptographic hardware is vulnerable to power analysis attacks. To resist these attacks, special balanced dual-rail gates have been developed which have equal power consumption for all valid data values and transitions. A limitation of existing designs is that they require balanced routing of the dual-rail interconnect between gates. Natural process variation and suboptimal routing tools make it practically impossible to perfectly match the capacitances of the dual-rail pair making the balanced… CONTINUE READING
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