Point DCT VLSI Architecture for Emerging HEVC Standard

@article{Ahmed2012PointDV,
  title={Point DCT VLSI Architecture for Emerging HEVC Standard},
  author={Ashfaq Ahmed and Muhammad Usman Shahid and Ata ur Rehman},
  journal={VLSI Design},
  year={2012},
  volume={2012},
  pages={752024:1-752024:13}
}
This work presents a flexible VLSI architecture to compute the N-point DCT. Since HEVC supports different block sizes for the computation of the DCT, that is, 4× 4 up to 32× 32, the design of a flexible architecture to support them helps reducing the area overhead of hardware implementations. The hardware proposed in this work is partially folded to save area and to get speed for large video sequences sizes. The proposed architecture relies on the decomposition of the DCT matrices into sparse… CONTINUE READING
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