Physical Security Evaluation of the Bitstream Encryption Mechanism of Altera Stratix II and Stratix III FPGAs

@article{Swierczynski2014PhysicalSE,
  title={Physical Security Evaluation of the Bitstream Encryption Mechanism of Altera Stratix II and Stratix III FPGAs},
  author={Pawel Swierczynski and Amir Moradi and David Oswald and Christof Paar},
  journal={TRETS},
  year={2014},
  volume={7},
  pages={34:1-34:23}
}
To protect Field-Programmable Gate Array (FPGA) designs against Intellectual Property (IP) theft and related issues such as product cloning, all major FPGA manufacturers offer a mechanism to encrypt the bitstream that is used to configure the FPGA. From a mathematical point of view, the employed encryption algorithms (e.g., Advanced Encryption Standard (AES) or 3DES) are highly secure. However, it has been shown that the bitstream encryption feature of several FPGA families is susceptible to… CONTINUE READING
Highly Cited
This paper has 19 citations. REVIEW CITATIONS
14 Citations
3 References
Similar Papers

Citations

Publications citing this paper.
Showing 1-10 of 14 extracted citations

References

Publications referenced by this paper.

Similar Papers

Loading similar papers…