Photonic Device Layout Within the Foundry CMOS Design Environment

@article{Orcutt2010PhotonicDL,
  title={Photonic Device Layout Within the Foundry CMOS Design Environment},
  author={J. S. Orcutt and R. J. Ram},
  journal={IEEE Photonics Technology Letters},
  year={2010},
  volume={22},
  pages={544-546}
}
A design methodology to layout photonic devices within standard electronic complementary metal-oxide-semiconductor (CMOS) foundry data preparation flows is described. This platform has enabled the fabrication of designs in three foundry scaled-CMOS processes from two semiconductor manufacturers. 
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