Corpus ID: 17723346

Phase Frequency Detector and Charge Pump For DPLL Using 0.18µm CMOS Technology

@inproceedings{Patel2013PhaseFD,
  title={Phase Frequency Detector and Charge Pump For DPLL Using 0.18µm CMOS Technology},
  author={Kashyap Patel and Nilesh D. Patel},
  year={2013}
}
  • Kashyap Patel, Nilesh D. Patel
  • Published 2013
  • Engineering
  • This paper presents a Low power phase frequency detector with charge pump for low power phase lock loop. The phase frequency detector with dead zone compensation has been proposed. The paper contains the detailed circuit diagram of PFD and charge pump with 1.8v power supply and 500MHz input frequency. The design has been realized using 0.18um CMOS technology. 
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