Performance evaluation of network processor architectures: combining simulation with analytical estimation

@article{Chakraborty2003PerformanceEO,
  title={Performance evaluation of network processor architectures: combining simulation with analytical estimation},
  author={Samarjit Chakraborty and Simon K{\"u}nzli and Lothar Thiele and Andreas Herkersdorf and Patricia Sagmeister},
  journal={Computer Networks},
  year={2003},
  volume={41},
  pages={641-665}
}
The design of most systems-on-a-chip (SoC) architectures rely on simulation as a means for performance estimation. Such designs usually start with a parameterizable template architecture, and the design space exploration is restricted to identifying the suitable parameters for all the architectural components. However, in the case of heterogeneous SoC architectures such as network processors the design space exploration also involves a combinatorial aspect—which architectural components are to… CONTINUE READING
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