Performance estimation of embedded software with instruction cache modeling

  title={Performance estimation of embedded software with instruction cache modeling},
  author={Yau-Tsun Steven Li and Sharad Malik and Andrew Wolfe},
Embedded systems generally interact with the outside world. Thus, some real-time constraints may be imposed on the system design. Verification of these constraints requires computing a tight upper bound on the worst case execution time (WCET) of a hardware/software system. The problem of bounding WCET is particularly difficult on modern processors, which use cache-based memory systems that vary memory access time significantly. This must be accurately modeled in order to tightly bound WCET… CONTINUE READING
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Co-synthesis of hardware and software for digital embedded systems

  • R. K. GUPTA
  • Ph.D. Dissertation. Stanford University, Stanford…
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