Performance and energy analysis of task-level graph transformation techniques for dynamically reconfigurable architectures

@article{Noguera2005PerformanceAE,
  title={Performance and energy analysis of task-level graph transformation techniques for dynamically reconfigurable architectures},
  author={Juanjo Noguera and Rosa M. Badia},
  journal={International Conference on Field Programmable Logic and Applications, 2005.},
  year={2005},
  pages={563-567}
}
In this paper, we present an analysis of the impact in both performance and energy of several task-level graph transformation techniques to exploit the parallel processing capabilities of run-time partially reconfigurable architectures. The proposed techniques have been applied to an image processing application (i.e., image sharpening), which has been implemented in a real research platform.