Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path

@article{Galanis2008PerformanceAE,
  title={Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path},
  author={Michalis D. Galanis and Grigoris Dimitroulakos and Constantinos E. Goutis},
  journal={Journal of Signal Processing Systems},
  year={2008},
  volume={50},
  pages={179-200}
}
The speedups and the energy reductions achieved in a generic single-chip microprocessor system by employing a high-performance data-path are presented. The data-path acts as a coprocessor that accelerates computational intensive kernel sections thereby increasing the overall performance. The authors have previously introduced the data-path which is composed by flexible computational components (FCCs). These components can realize any two-level sequence of primitive operations. The automated… CONTINUE READING

Figures, Tables, Results, and Topics from this paper.

Key Quantitative Results

  • The energy savings range from 41 to 74%, while the reduction in the application energy-delay product has an average value of 80%.
  • Additionally, the FCC2-based systems exhibit a 58.2% average reduction, whereas the Templ2-based platforms achieve 47.3% on average reduction over the all-software solution.

Citations

Publications citing this paper.
SHOWING 1-2 OF 2 CITATIONS

Modern Architectures for Embedded Reconfigurable Systems - a Survey

  • Journal of Circuits, Systems, and Computers
  • 2009
VIEW 1 EXCERPT
CITES METHODS

Arithmetic Operations and Their Energy Consumption in the Nios II Embedded Processor

  • 2008 International Conference on Reconfigurable Computing and FPGAs
  • 2008
VIEW 1 EXCERPT
CITES BACKGROUND

References

Publications referenced by this paper.
SHOWING 1-10 OF 28 REFERENCES

Data-Path for Synthesizing DSP Kernels^, in IEEE Trans

M. D. Galanis, G. Theodoridis, S. Tragoudas, C. E. Goutis, BA High Performanc
  • on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 25, no. 6,
  • 2006
VIEW 9 EXCERPTS
HIGHLY INFLUENTIAL

Measuring the Gap Between FPGAs and ASICs

  • IEEE Trans. on CAD of Integrated Circuits and Systems
  • 2007
VIEW 1 EXCERPT

Novel architecture for loop acceleration: a case study

  • 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05)
  • 2005
VIEW 1 EXCERPT

and B

G. Stitt, F. Vahid, G. McGrego
  • Einloth, BHardware/ Software Partitioning of Software Binaries: A Case Study of H.264 Decode^, in Proc. of CODES+ISSS _05,
  • 2005
VIEW 3 EXCERPTS

Co-processor synthesis: a new methodology for embedded software acceleration

  • Proceedings Design, Automation and Test in Europe Conference and Exhibition
  • 2004
VIEW 1 EXCERPT