Performance analysis of radix-4 adders

@article{Asif2012PerformanceAO,
  title={Performance analysis of radix-4 adders},
  author={Shahzad Asif and Mark Vesterbacka},
  journal={Integration},
  year={2012},
  volume={45},
  pages={111-120}
}
We present a radix-4 static CMOS full adder circuit that reduces the propagation delay, PDP, and EDP in carrybased adders compared with using a standard radix-2 full adder solution. The improvements are obtained by employing carry look-ahead technique at the transistor level. Spice simulations using 45 nm CMOS technology parameters with a power supply voltage of 1.1 V indicate that the radix-4 circuit is 24% faster than a 2-bit radix-2 ripple carry adder with slightly larger transistor count… CONTINUE READING

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