Improving cache locking performance of modern embedded systems via the addition of a miss table at the L2 cache level
Multicore processors are a common and a necessary step in the evolution of the microprocessor. Today's general-purpose multicore processors cannot even provide soft real-time guarantee. This work studies the performance of cache-locking on a general-purpose multicore processor. The performance results for two different locking methods are determined in a variety of multicore configurations. It is discovered that L2 cache-locking performs the best and is expected to substantially improve predictability.