Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs


This paper proposes a new model for the partitioning and scheduling of a specification on partially dynamically reconfigurable hardware. Although this problem can be solved optimally only by tackling its subproblems jointly, the exceeding complexity of such a task leads to a decomposition into two phases. The partitioning phase is based on a new graph… (More)
DOI: 10.1109/TCAD.2009.2015739


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