Parameterised floating-point arithmetic on FPGAs

@article{Jaenicke2001ParameterisedFA,
  title={Parameterised floating-point arithmetic on FPGAs},
  author={A. Jaenicke and W. Luk},
  journal={2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221)},
  year={2001},
  volume={2},
  pages={897-900 vol.2}
}
  • A. Jaenicke, W. Luk
  • Published 2001
  • Computer Science
  • 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221)
This paper describes the parameterisation, implementation and evaluation of floating-point adders and multipliers for FPGAs. We have developed a method, based on the Handel-C language, for producing technology-independent pipelined designs that allow compile-time parameterisation of design precision and range, and optional inclusion of features such as overflow protection, gradual underflow and rounding modes of the IEEE floating-point format. The resulting designs, when implemented in a Xilinx… Expand
NORMALIZATION ON FLOATING POINT MULTIPLICATION USING VERILOG HDL
An FPGA based high speed IEEE-754 double precision floating point multiplier using Verilog
  • A. Ramesh, A. Tilak, A. M. Prasad
  • Computer Science
  • 2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)
  • 2013
An efficient implementation of floating point multiplier
An Efficient Implementation Of Floating Point Multiplier
Automating Customisation of Floating-Point Designs
...
1
2
3
4
5
...

References

SHOWING 1-10 OF 18 REFERENCES
Implementation of IEEE single precision floating point addition and multiplication on FPGAs
A re-evaluation of the practicality of floating-point operations on FPGAs
Field programmable gate arrays and floating point arithmetic
Quantitative analysis of floating point arithmetic on FPGA based custom computing machines
Calculating the FHT in hardware
Customising graphics applications: techniques and programming interface
  • H. Styles, W. Luk
  • Computer Science
  • Proceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871)
  • 2000
A re-evaluationof the practicalityof floating-pointoperationson FPGAs”,Proc
  • IEEE Symp. on FPGAs for Custom Comput. Machines,
  • 1998
andAthanas,P. “Quantitative analysisof floating-pointarithmeticon FPGAbasedcustomcomputingmachines”,Proc
  • IEEE Symp. on FPGAs for Custom Comput. Machines,
  • 1995
...
1
2
...