Parameter-Variation-Aware Analysis for Noise Robustness

  title={Parameter-Variation-Aware Analysis for Noise Robustness},
  author={Mosin Mondal and Kartik Mohanram and Yehia Massoud},
  journal={8th International Symposium on Quality Electronic Design (ISQED'07)},
This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-duration profiles, and can be used to derive a noise susceptibility metric for the noise robustness of logic gates. Analytical methods - based upon calibration runs in circuit simulators - to determine noise susceptibility in the presence of variations in process, design, and environmental parameters (Leff, VT, VDD, and W… CONTINUE READING
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Logical effort: Designing fast CMOS circuits

  • I. Sutherland, B. Sproull, D. Harris
  • Proceedings of the 8th International Symposium on…
  • 1999
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