Parallelizing Word2Vec in Multi-Core and Many-Core Architectures


Word2vec is a widely used algorithm for extracting low-dimensional vector representations of words. State-of-the-art algorithms including those by Mikolov et al. [5, 6] have been parallelized for multi-core CPU architectures, but are based on vector-vector operations with “Hogwild" updates that are memory-bandwidth intensive and do not efficiently use… (More)


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@article{Ji2016ParallelizingWI, title={Parallelizing Word2Vec in Multi-Core and Many-Core Architectures}, author={Shihao Ji and Nadathur Satish and Sheng Li and Pradeep Dubey}, journal={CoRR}, year={2016}, volume={abs/1611.06172} }