## High-performance scalable architecture for modular multiplication using a new digit-serial computation

- Abdalhossein Rezai, Parviz Keshavarzi
- Microelectronics Journal
- 2016

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@inproceedings{Pinckney2007ParallelizedRS, title={Parallelized radix-4 scalable montgomery multipliers}, author={Nathaniel Ross Pinckney and David Money Harris}, booktitle={SBCCI}, year={2007} }

- Published 2007 in SBCCI
DOI:10.1145/1284480.1284562

This paper describes a parallelized radix-4 scalable Montgomery multiplier implementation. The design does not require hardware multipliers, and uses parallelized multiplication to shorten the critical path. By left-shifting the sources rather than right-shifting the result, the latency between processing elements is shortened from two cycles to nearly one. The new design can perform 1024-bit modular exponentiation in 8.7 ms and 256-bit exponentiation in 0.36 ms using 5916 Virtex2 4-inputâ€¦Â CONTINUE READING

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