Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems

@article{Mutlu2008ParallelismAwareBS,
  title={Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems},
  author={Onur Mutlu and Thomas Moscibroda},
  journal={2008 International Symposium on Computer Architecture},
  year={2008},
  pages={63-74}
}
In a chip-multiprocessor (CMP) system, the DRAM system isshared among cores. In a shared DRAM system, requests from athread can not only delay requests from other threads by causingbank/bus/row-buffer conflicts but they can also destroy other threads’DRAM-bank-level parallelism. Requests whose latencies would otherwisehave been overlapped could effectively become serialized. As aresult both fairness and system throughput degrade, and some threadscan starve for long time periods.This paper… CONTINUE READING
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