Parallel visualization algorithms: performance and architectural implications

@article{Singh1994ParallelVA,
  title={Parallel visualization algorithms: performance and architectural implications},
  author={Jaswinder Pal Singh and Anoop Gupta and Marc Levoy},
  journal={Computer},
  year={1994},
  volume={27},
  pages={45-55}
}
Recently, a new class of scalable, shared-address-space multiprocessors has emerged. Like message-passing machines, these multiprocessors have a distributed interconnection network and physically distributed main memory. However, they provide hardware support for efficient implicit communication through a shared address space, and they automatically exploit temporal locality by caching both local and remote data in a processor's hardware cache. In this article, we show that these architectural… CONTINUE READING

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References

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Generation ..' C o r r i p i r fer Grcrphics

J. P. Singh
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His research interests are the design of hardware and software for large-scale multiprocessors

Mellon University. where he received his PhD in
  • Gupta received the NSF Presidential Young Investigator Award in 1990 and
  • 1986

Architecture and an MS from Cornell University in 1976 and 1978. respectively, and a PhD in computer science from the University of North Carolina

B. Levoy received a
  • 1978