Parallel trace register allocation

  title={Parallel trace register allocation},
  author={Josef Eisl and David Leopoldseder and Hanspeter M{\"o}ssenb{\"o}ck},
  booktitle={ManLang '18},
Register allocation is a mandatory task for almost every compiler and consumes a significant portion of compile time. In a just-in-time compiler, compile time is a particular issue because compilation happens during program execution and contributes to the overall application run time. Parallelization can help here. We developed a theoretical model for parallel register allocation and show that it can be used in practice without a negative impact on the quality of the allocation result. Doing… 

Figures and Tables from this paper

Pre-compiling Parallel Algorithms for Compilers into a Network

The paper presents a novel pre-compiler approach by introducing several algorithms to solve the NP-hard problem of transferring a large number of files from a data center, encrypt it using compilers and send it through a network in the optimum time possible.



Trace register allocation

Trace Register Allocation is proposed, a register allocation approach that is tailored for just-in-time (JIT) compilation in the context of virtual machines with run-time feedback to offload costly operations such as spilling and splitting to less frequently executed branches and to focus on efficient registers allocation for the hot parts of a program.

Trace-based Register Allocation in a JIT Compiler

A novel non-global algorithm is proposed, which splits a compilation unit into traces based on profiling feedback and subsequently performs register allocation within each trace individually, which simplifies the problem a register allocator needs to solve.

Trace Register Allocation Policies: Compile-time vs. Performance Trade-offs

This work presents a register allocation framework that can exploit the additional flexibility of traces to select different allocation strategies based on the characteristics of a trace, providing fine-grained control over the trade-off between compile time and peak performance in a just-in-time compiler.

Quality and speed in linear-scan register allocation

This paper implements both register allocators within the Machine SUIF extension of the Stanford SUIF compiler system and describes improvements to the linear-scan approach that allow it to produce code of a quality near to that produced by graph coloring.

Linear scan register allocation on SSA form

The linear scan register allocator of the Java HotSpot client compiler is modified so that it operates on SSA form, and the simpler and faster version generates equally good or slightly better machine code.

Optimized interval splitting in a linear scan register allocator

An optimized implementation of the linear scan register allocation algorithm for Sun Microsystems' Java HotSpot™ client compiler is presented, with the high impact of the Intel SSE2 extensions on the speed of numeric Java applications.

Reducing the overhead of dynamic compilation

Two dynamic compilation techniques are presented that enable high performance execution while reducing the effect of this compilation overhead, decreasing the amount of compilation performed, and overlapping compilation with execution.

Global Register Allocation Based on Graph Fusion

This paper presents a new coloring-based global register allocation algorithm that addresses all three issues in an integrated way: the algorithm starts with an interference graph for each region of the program, where a region can be a basic block, a loop nest, a superblock, a trace, or another combination of basic blocks.

Linear scan register allocation

A new algorithm for fast global register allocation called linear scan, which allocates registers to variables in a single linear-time scan of the variables' live ranges, is described.