Parallel hierarchical reachability analysis for analog verification

@article{Lin2014ParallelHR,
  title={Parallel hierarchical reachability analysis for analog verification},
  author={Honghuang Lin and Peng Li},
  journal={2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)},
  year={2014},
  pages={1-6}
}
Formal methods such as reachability analysis often suffer from state space explosion in the verification of complex analog circuits. This paper proposes a parallel hierarchical SMT-based reachability analysis technique based on circuit decomposition. Circuits are systematically decomposed into subsystems with less complex transient behaviors which can be solved in parallel. Then a simulation-assisted SMT-based reachability analysis approach is adopted to conservatively approximate the reachable… CONTINUE READING