Parallel Huffman Decoder with an Optimize Look UP Table Option on FPGA

@inproceedings{Zulfakar2004ParallelHD,
  title={Parallel Huffman Decoder with an Optimize Look UP Table Option on FPGA},
  author={Zulfakar and Zulkalnain Mohd Yusof and Ishak Suleiman},
  year={2004}
}
Total Bit = PnXBi t Abstract Compression is very important for system with limited channel bandwidth and/or limited storage size. One of the main components in imagehideo compression is a variable length coding (VLC). This paper would discuss about one of the most popular VLC known as Huffman Coding. In our present work, a real time hardware parallel Huffman decoder has been successfully designed and implemented using 50,000 gate FPGA (FLEX1OK20 from Altera). The parallelism is important to be… CONTINUE READING
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References

Publications referenced by this paper.
Showing 1-5 of 5 references

JAGUAR: A Fully Pipelined VLSI Architecture for JPEG Image Compression Standard

M. Kovac, N. Ranganathan
Proceedings of the IEEE, • 1995

VLSI Architectures for Video Compression - A Survey.

Peter Pirsch, Nicolas Demassieux, Winfried Gehrke
Proceeding of IEEE, • 1995

High-speed VLSI SYSTEMS-11: ANALOG AND DIGITAL SIGNAL (JUNE): 111-133

K. Parhi
1992

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