Parallel Cycle Simulation

@inproceedings{Hering1996ParallelCS,
  title={Parallel Cycle Simulation},
  author={Klaus Hering},
  year={1996}
}
Parallelization of logic simulation on register-transfer and gate level is a promising way to accelerate extremely time extensive system simulation processes for whole processor structures. In this report parallel simulation realized by means of the functional simulator parallelTEXSIM based on the clock-cycle algorithm is considered. Within a corresponding simulation, several simulator instances co-operate over a loosely-coupled processor system, each instance simulating a part of a synchronous… CONTINUE READING
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References

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2 Excerpts

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