Packet Switched vs. Time Multiplexed FPGA Overlay Networks

  title={Packet Switched vs. Time Multiplexed FPGA Overlay Networks},
  author={Nachiket Kapre and Nikil Mehta and Michael DeLorimier and Raphael Rubin and Henry Barnor and Michael J. Wilson and Michael G. Wrighton and Andr{\'e} DeHon},
  journal={2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines},
Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited degree of PE interconnectivity (e.g. wiring up gates and datapaths). Applications which virtualize PEs may require a large number of distinct PE-to-PE connections (e.g. using one PE to simulate 100s of operators, each requiring input data from thousands of other operators), but with each connection having low throughput… CONTINUE READING
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Principles and Practices of Interconnection Networks

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