Packet Processing on the GPU

Abstract

Packet processing in routers is traditionally implemented in hardware; specialized ASICs are employed to forward packets at line rates of up to 100 Gbps. Recently, however, improving hardware and an interest in complex packet processing has prompted the networking community to explore software routers; though they are more flexible and easier to program, achieving forwarding rates comparable to hardware routers is challenging. Given the highly parallel nature of packet processing, a GPU-based router architecture is an inviting option (and one which the community has begun to explore). In this project, we explore the pitfalls and payoffs of implementing a GPU-based software router.

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Cite this paper

@inproceedings{Mukerjee2012PacketPO, title={Packet Processing on the GPU}, author={Matthew K. Mukerjee and David Naylor and Bruno Vavala}, year={2012} }