PACES: A Partition-Centering-Based Symmetry Placement for Binary-Weighted Unit Capacitor Arrays

Abstract

Capacitor matching influences linearity performance, which is a critical measure of analog-to-digital converters (ADCs). Various placement techniques have been proposed to eliminate both systematic and random mismatches of capacitor pairs. However, a placement technique that eliminates capacitor mismatches may not result in good linearity performance for… (More)
DOI: 10.1109/TCAD.2016.2561403

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Cite this paper

@article{Huang2017PACESAP, title={PACES: A Partition-Centering-Based Symmetry Placement for Binary-Weighted Unit Capacitor Arrays}, author={Chien-Chih Huang and Jwu-E Chen and Chin-Long Wey}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, year={2017}, volume={36}, pages={134-145} }