Optimizing the flux and torque estimator of DTC in FPGA by using low-area square root calculator

This paper presents an alternative to improve the implementation of the torque and flux estimator for the Direct Torque Control (DTC) of induction motor drives in Field Programmable Gate Array (FPGA). The square root architecture is optimized to have low hardware resources utilization, by reducing the number of logic elements used, and subsequently… CONTINUE READING