Optimizing the FPGA Memory Design for a Sobel Edge Detector

@inproceedings{Moore2009OptimizingTF,
  title={Optimizing the FPGA Memory Design for a Sobel Edge Detector},
  author={Craig Moore and Harald Devos and Dirk Stroobandt},
  booktitle={ERSA},
  year={2009}
}
Index Terms—Field programmable gate arrays, Memories, Memory architecture, Buffers Abstract—This research explored different memory systems on FPGA chips in order to show the various trade-offs involved with choosing one memory system over another. We explored the different memory components that are found on FPGA chips using the example of a Sobel edge detector. We demonstrated how the different FPGA chip's memories affected I/O performance and area. By exploiting the trade-offs between these… CONTINUE READING

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