Optimizing Pairwise Box Intersection Checking on GPUs for Large-Scale Simulations

  title={Optimizing Pairwise Box Intersection Checking on GPUs for Large-Scale Simulations},
  author={Shih-Hsiang Lo and Che-Rung Lee and I-Hsin Chung and Yeh-Ching Chung},
  journal={ACM Trans. Model. Comput. Simul.},
Box intersection checking is a common task used in many large-scale simulations. Traditional methods cannot provide fast box intersection checking with large-scale datasets. This article presents a parallel algorithm to perform Pairwise Box Intersection checking on Graphics processing units (PBIG). The PBIG algorithm consists of three phases: planning, mapping and checking. The planning phase partitions the space into small cells, the sizes of which are determined to optimize performance. The… CONTINUE READING


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Intersecting sequences of dD iso-oriented boxes

  • L. Kettner, A. Meyer, A. Zomorodian
  • http://www.cgal.org.
  • 2011
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