Optimized Implementation of RNS FIR Filters Based on FPGAs

@article{Pontarelli2012OptimizedIO,
  title={Optimized Implementation of RNS FIR Filters Based on FPGAs},
  author={Salvatore Pontarelli and Gian-Carlo Cardarilli and Marco Re and Adelio Salsano},
  journal={Signal Processing Systems},
  year={2012},
  volume={67},
  pages={201-212}
}
In this paper optimized Residue Number System (RNS) arithmetic blocks to better exploit some of the architectural characteristics of the last generation FPGAs are presented. The implementation of modulo m adders, modulo m constant and general multipliers, input and output converters are presented. These architectures are based on moduli sets chosen in order to optimally use the 6-input Look-Up Tables (LUTs) available in the Complex Logic Blocks (CLBs) of the new generation FPGAs. Experiments… CONTINUE READING

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