Optimization of series resistance in sub-0.2 /spl mu/m SOI MOSFET's

@article{Su1994OptimizationOS,
  title={Optimization of series resistance in sub-0.2 /spl mu/m SOI MOSFET's},
  author={L. Su and M. J. Sherony and Hang Hu and J. Chung and D. A. Antoniadis},
  journal={IEEE Electron Device Letters},
  year={1994},
  volume={15},
  pages={145-147}
}
The optimization of device series resistance in ultrathin film SOI devices is studied through 3-D simulations and process experiments. The series resistance is dependent on the contact resistivity of the silicide to silicon and the silicide geometry. To achieve low series resistance, very thin silicides that do not fully consume the SOI film are needed. A novel cobalt salicidation technology using titanium/cobalt laminates is used to demonstrate sub-0.2 /spl mu/m, thin-film SOI devices with… CONTINUE READING