Corpus ID: 19223159

Optimization of logic area for System on Programmable Chip based on hardware-software partitioning

@inproceedings{Jemai2014OptimizationOL,
  title={Optimization of logic area for System on Programmable Chip based on hardware-software partitioning},
  author={Mehdi Jemai and S. Dimassi and B. Ouni and A. Mtibaa},
  year={2014}
}
  • Mehdi Jemai, S. Dimassi, +1 author A. Mtibaa
  • Published 2014
  • T In this paper, we propose an approach based on hardware-software partitioning to minimize logic area of a SOPC circuit "System on a Programmable Chip". This approach minimizes the SOPC area while satisfying a time constraint. To minimize this area, we propose an algorithm to determine the critical path with the largest number of hardware tasks in a given data flow graph. Once these hardware tasks are determined, they will be implemented on the software. In this way we minimize the number of… CONTINUE READING
    7 Citations

    Tables from this paper

    Reducing power consumption for system on programmable chip by scheduling tasks
    Combined Partitioning Hardware-Software Algorithms
    • 1
    Meta-heuristics: For the problem of partitioning hardware/software

    References

    SHOWING 1-9 OF 9 REFERENCES
    MAGELLAN: multiway hardware-software partitioning and scheduling for latency minimization of hierarchical control-dataflow task graphs
    • Karam S. Chatha, R. Vemuri
    • Computer Science
    • Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)
    • 2001
    • 71
    • PDF
    An algorithm for partitioning of application specific systems
    • Zebo Peng, K. Kuchcinski
    • Computer Science
    • 1993 European Conference on Design Automation with the European Event in ASIC Design
    • 1993
    • 73
    • PDF
    Low-complex dynamic programming algorithm for hardware/software partitioning
    • 66
    • PDF
    Integrating Physical Constraints in HW-SW Partitioning for Architectures With Partial Dynamic Reconfiguration
    • 87
    • PDF
    Hardware-software partitioning and pipelined scheduling of transformative applications
    • 110
    • PDF
    Comparing Three Heuristic Search Methods for Functional Partitioning in Hardware–Software Codesign
    • 152
    • PDF
    Network-flow-based multiway partitioning with area and pin constraints
    • 49
    • PDF
    Uncertain Model and Algorithm for Hardware/Software Partitioning
    • 25
    • PDF