Optimization of Robust Asynchronous Circuits by Local Input Completeness Relaxation

@article{Jeong2007OptimizationOR,
  title={Optimization of Robust Asynchronous Circuits by Local Input Completeness Relaxation},
  author={Cheoljoo Jeong and Steven M. Nowick},
  journal={2007 Asia and South Pacific Design Automation Conference},
  year={2007},
  pages={622-627}
}
  • Cheoljoo Jeong, S. Nowick
  • Published 23 January 2007
  • Computer Science
  • 2007 Asia and South Pacific Design Automation Conference
As process, temperature and voltage variations become significant in deep submicron design, timing closure becomes a critical challenge using synchronous CAD flows. One attractive alternative is to use robust asynchronous circuits which gracefully accommodate timing discrepancies. However, these asynchronous circuits typically suffer from high area and latency overhead. In this paper, an optimization algorithm is presented which reduces the area and delay of these circuits by relaxing their… 

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