Optimization of III-V FET architectures for high frequency and low consumption applications

@article{Shi2010OptimizationOI,
  title={Optimization of III-V FET architectures for high frequency and low consumption applications},
  author={Ming An Shi and Jerome Saint-Martin and Arnaud Bournel and Philippe Dollfus},
  journal={2010 Proceedings of the European Solid State Device Research Conference},
  year={2010},
  pages={424-427}
}
To fulfill high-speed and low-power specifications for intelligent applications, III-V FETs (Field Effect Transistor) with high-к gate dielectric stack are very appealing. Indeed, combining weak gate leakage of standard MOSFETs and good RF performance of HEMTs, they could enhance device scalability. Using full 2D Poisson-Schrödinger solver and then semi… CONTINUE READING