Optimal wire ordering and spacing in low power semiconductor design

  title={Optimal wire ordering and spacing in low power semiconductor design},
  author={Peter Gritzmann and Michael Ritter and Paul Zuber},
  journal={Math. Program.},
A key issue for high integration circuit design in the semiconductor industry are power constraints that stem from the need for heat removal and reliability or battery lifetime limitations. As the power consumption depends heavily on the capacitances between adjacent wires, determining the optimal ordering and spacing of parallel wires is an important issue in the design of low power chips. As it turns out, optimal wire spacing is a convex optimization problem whereas the optimal wire ordering… CONTINUE READING


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