Optimal test access architectures for system-on-a-chip

@article{Chakrabarty2001OptimalTA,
  title={Optimal test access architectures for system-on-a-chip},
  author={Krishnendu Chakrabarty},
  journal={ACM Trans. Design Autom. Electr. Syst.},
  year={2001},
  volume={6},
  pages={26-49}
}
Test access is a major problem for core-based system-on-a-chip (SOC) designs. Since embedded cores in an SOC are not directly accessible via chip inputs and outputs, special access mechanisms are required to test them at the system level. An efficient test access architecture should also reduce test cost by minimizing test application time. We address several issues related to the design of optimal test access architectures that minimize testing time., including the assignment of cores to test… CONTINUE READING

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