Optimal choice of arithmetic compactors for mixed-signal systems

@article{Geurkov2012OptimalCO,
  title={Optimal choice of arithmetic compactors for mixed-signal systems},
  author={Vadim Geurkov},
  journal={2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)},
  year={2012},
  pages={182-186}
}
Compaction circuits that have been used for mixed-signal systems testing constitute a part of encoding/decoding device for an arithmetic error-control code (ECC). These circuits are commonly referred to as residue computing circuits (RCCs). As ECCs originated primarily to protect data transfers over binary channels, their design methodology has been mostly oriented towards a binary case. A non-binary design technique has only been considered for a special type of compaction modulus. In this… CONTINUE READING