Opportunities and Challenges of Tunnel FETs

@article{Pandey2016OpportunitiesAC,
  title={Opportunities and Challenges of Tunnel FETs},
  author={Rahul Pandey and Saurabh Mookerjea and Suman Datta},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2016},
  volume={63},
  pages={2128-2138}
}
Sustaining of Moore's Law over the next decade will require not only continued scaling of the physical dimensions of transistors but also performance improvement and aggressive reduction in power consumption. Heterojunction Tunnel FET (TFET) has emerged as promising transistor candidate for supply voltage scaling down to sub-0.5V due to the possibility of sub-kT/q switching without compromising on-current (ION). Recently, n-type III-V HTFET with reasonable on-current and sub-kT/q switching at… CONTINUE READING