One-Level Storage System

  title={One-Level Storage System},
  author={T. Kilburn and D. Edwards and M. Lanigan and F. Sumner},
  journal={IRE Trans. Electron. Comput.},
After a brief survey of the basic Atlas machine, the paper describes an automatic system which in principle can be applied to any combination of two storage systems so that the combination can be regarded by the machine user as a single level. The actual system described relates to a fast core store-drum combination. The effect of the system on instruction times is illustrated, and the tape transfer system is also introduced since it fits basically in through the same hardware. The scheme… Expand

Topics from this paper

Virtual memories for mini-computers
The system constraints and their effect on the design parameters are discussed in detail and a general design philosophy is developed and a specific implementation of a virtual memory system on a PDP-11/20 is described. Expand
A time- and memory-sharing executive program for quick-response on-line applications
  • J. Forgie
  • Computer Science
  • AFIPS '65 (Fall, part I)
  • 1965
The executive program which has been designed to satisfy the needs of that system as well as the other activities currently soaking up the computational energies of TX-2, a fast-response time-sharing system for memory and program-sharing. Expand
Design of Software for On-Line Minicomputer Applications
The advent of the minicomputer is having a profound influence on real-time applications such as data acquisition, direct digital control, supervisory control, manufacturing monitoring and control,Expand
A time- and memory-sharing executive program for quick-response on-line applications
The TX-2 Computer, an experimental facility at M.I.T. Lincoln Laboratory, has been in operation since 1960 and has been used principally in a number of long-term research projects that have taken advantage of the special input/output capabilities and the direct accessibility of the machine. Expand
A time-sharing system using an associative memory
The hardware scheme designed to implement an experimental IBM System/360, Model 40 time-sharing system will be discussed. The concept of a virtual system will be introduced which allows up to fifteenExpand
Multics (Multiplexed Information and Computing Service) is a comprehensive, general-purpose programming system which is being developed as a research project. The initial Multics system will beExpand
SYMBOL: a large experimental system exploring major hardware replacement of software
The SYMBOL system is the result of a major developmental effort to increase the functional capability of hardware and to reduce the overall complexity and cost of computing. Expand
System/360 and Bayond
  • A. Padegs
  • Engineering, Computer Science
  • IBM J. Res. Dev.
  • 1981
The evolution of modern large-scale computer architecture within IBM is described, starting with the announcement of System/360 in 1964 and covering the latest extensions to System/370. Emphasis isExpand
A Study of Replacement Algorithms for Virtual-Storage Computer
One of the basic limitations of a digital computer is the size of its available memory; an approach that permits the programmer to use a sufficiently large address range can accomplish this objective, assuming that means are provided for automatic execution of the memory-overlay functions. Expand
Introduction and overview of the multics system
Multics (Multiplexed Information and Computing Service) is a comprehensive, general-purpose programming system which is being developed as a research project and will be implemented on the GE 645 computer. Expand


A digital computer store with very short read time
The paper describes the principles of operation and the construction of storage units with a very short access time for reading. One form of the store which has been constructed has a capacity of 200Expand
Ferrite-core memory systems with rapid cycle times
Improvements in storage systems using currently available square-loop ferrite cores are considered. These enable the normal cycle time of 6–10 microsec to be reduced to less than 2 microsec. EffortExpand
Mercury: a high-speed digital computer
Details are given of the design and construction of a new universal high-speed serial digital computer with a digit repetition frequency of 1 Mc/s. Logical differences between the production machine,Expand
The Manchester University Mark II digital-computing machine
The paper describes the Mark II digital-computing machine now operating in the Computing Machine Laboratory of Manchester University, which has a floating-point accumulator, numbers being represented in the form x2y where x and y are respectively 30 and 10 digits in length. Expand
A parallel arithmetic unit using a saturated-transistor fast-carry circuit
The paper describes a transistor switch technique which is of particular importance in applications where a large number of switches have to be connected in series and where the propagation time ofExpand
Some Techniques for dealing with Two-Level Storage