Corpus ID: 15325109

On the Stability and Robustness of Non-Synchronous Circuits with Timing Loops

@inproceedings{Fgger2009OnTS,
  title={On the Stability and Robustness of Non-Synchronous Circuits with Timing Loops},
  author={Matthias F{\"u}gger and Gottfried Fuchs and Ulrich Schmid},
  year={2009}
}
Among the most pressing issues in current deep submicron VLSI circuits are large parameter variations, primarily caused by process technology imperfections, that result in excessive delay variations, and continuously increasing soft error rates. The former seriously challenges the classic synchronous design paradigm, and coping with the latter requires suitable fault-tolerant architectures. In this paper, we present first results of the parameter sensitivity analysis of our DARTS fault-tolerant… Expand
STAND-ALONE PROJECT FINAL REPORT Project number Project title
Part 1 of the project report is intended for interested members of the public; parts 2-4 are addressed to reviewers and must be submitted in the language of the original application. Part 5 providesExpand

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