On the Limitations of Silicon for I-MOS Integration

  title={On the Limitations of Silicon for I-MOS Integration},
  author={Alessandro Savio and Stephane Monfray and Clement Charbuillet and Thomas Skotnicki},
  journal={IEEE Transactions on Electron Devices},
This paper discusses the scalability of the supply voltage with the device length in silicon impact ionization MOS (I-MOS) transistors, by presenting results from both experiments and simulations. It is first shown that the supply voltage of silicon I-MOS devices saturates at low device lengths and does not fall under about 4.5 V. Second, it is shown from 2-D simulations and measurements on sub-100-nm devices that the transistor effect is lost also at low device lengths. We then propose an… CONTINUE READING
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Reduction of impact-ionization threshold energies for performance enhancement of complementary impact-ionization metal–oxide–semiconductor transistors

  • E.-H. Toh, G. H. Wang, L. Chan, G. Samudra, Y.-C. Yeo
  • Appl. Phys. Lett., vol. 91, no. 15, p. 153 501…
  • 2007
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