On the Design of High Performance RF Integrated Inductors on High Resistively Thin Film 65 nm SOI CMOS Technology

@article{Gianesello2008OnTD,
  title={On the Design of High Performance RF Integrated Inductors on High Resistively Thin Film 65 nm SOI CMOS Technology},
  author={Frederic Gianesello and Daniel Gloria and Christine Raynaud and Sebastien Montusclat and Samuel Boret and P. Touret},
  journal={2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems},
  year={2008},
  pages={98-101}
}
During past years, High Resistivity (HR) SOI CMOS technology has emerged as a promising one for the integration of RF applications, mainly because of the improvement of passive component related to HR substrate. This paper summarizes, for the first time, an in depth analysis of different optimization scheme suitable for on-chip inductors fabricated on HR substrate, using advanced 65 nm SOI CMOS technology with 6 copper metal levels. Measurement results demonstrated that proposed optimized SOI… CONTINUE READING

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