On the Design and Implementation of a Cache-Aware Multicore Real-Time Scheduler

@article{Calandrino2009OnTD,
  title={On the Design and Implementation of a Cache-Aware Multicore Real-Time Scheduler},
  author={John M. Calandrino and James H. Anderson},
  journal={2009 21st Euromicro Conference on Real-Time Systems},
  year={2009},
  pages={194-204}
}
Multicore architectures, which have multiple processing units on a single chip, have been adopted by most chip manufacturers. Most such chips contain on-chip caches that are shared by some or all of the cores on the chip. Prior work has presented methods for improving the performance of such caches when scheduling soft real-time workloads. Given these methods, two additional research issues arise: (1) how to automatically profile the cache behavior of real-time tasks within the scheduler; and… CONTINUE READING

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