On generating tests that avoid the detection of redundant faults in synchronous sequential circuits with full scan

@article{Pomeranz2006OnGT,
  title={On generating tests that avoid the detection of redundant faults in synchronous sequential circuits with full scan},
  author={Irith Pomeranz and Sudhakar M. Reddy},
  journal={IEEE Transactions on Computers},
  year={2006},
  volume={55},
  pages={491-495}
}
Design-for-testability (DFT) techniques used for synchronous sequential circuits allow redundant faults, which do not affect the functional operation of the circuit, to be detected after DFT insertion. Detecting such faults can cause a chip that operates correctly to be discarded as faulty. A solution proposed earlier was to mask output values where… CONTINUE READING