Novel Reversible `TSG' Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU

@article{Thapliyal2005NovelR,
  title={Novel Reversible `TSG' Gate and Its Application for Designing Components of Primitive Reversible/Quantum ALU},
  author={H. Thapliyal and M. Srinivas},
  journal={2005 5th International Conference on Information Communications \& Signal Processing},
  year={2005},
  pages={1425-1429}
}
  • H. Thapliyal, M. Srinivas
  • Published 2005
  • Computer Science, Mathematics
  • 2005 5th International Conference on Information Communications & Signal Processing
In recent years, reversible logic has emerged as a promising computing paradigm having application in low power CMOS, quantum computing, nanotechnology, and optical computing. The classical set of gates such as AND, OR, and EXOR are not reversible. This paper utilizes a new 4*4 reversible gate called TSG gate to build the components of a primitive reversible/quantum ALU. The most significant aspect of the TSG gate is that it can work singly as a reversible full adder, that is reversible full… Expand
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References

SHOWING 1-10 OF 37 REFERENCES
A New Reversible TSG Gate and Its Application For Designing Efficient Adder Circuits
A Novel Reversible TSG Gate and Its Application for Designing Reversible Carry Look-Ahead and Other Adder Architectures
Reversible logic synthesis for minimization of full-adder circuit
Synthesis of full-adder circuit using reversible logic
Introduction to reversible computing: motivation, progress, and challenges
Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder
  • H. Babu, A. Chowdhury
  • Mathematics, Computer Science
  • 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
  • 2005
Optimal Circuits for Parallel Multipliers
Simulating the Fredkin Gate with Energy-Based P Systems
Logical reversibility of computation
...
1
2
3
4
...