Novel LC resonant clocking for 3D IC using TSV-inductor and capacitor

@article{Luo2017NovelLR,
  title={Novel LC resonant clocking for 3D IC using TSV-inductor and capacitor},
  author={Shaoheng Luo and Baixin Chen and Ke Li and Cheng Zhuo and Yiyu Shi},
  journal={2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)},
  year={2017},
  pages={1-3}
}
At sub-14nm regime, large area overhead induced by on-chip capacitor and inductor is a major concern to ensure power integrity or enable on-chip applications. To overcome this issue, a novel 3D Through-Silicon-Via (TSV) based capacitor is investigated in this work, which may achieve both high density and high performance. The capacitor simulated in this… CONTINUE READING